#ifndef RF_POWER_SET_H_
#define RF_POWER_SET_H_

//------------------------------------------------------
//4.2V	32M
//#define RF_18_7G_4V2_32M_DCOFF_RF3V3_8dBm
//#define RF_18_7G_4V2_32M_DCOFF_RF3V3_4dBm
//#define RF_18_7G_4V2_32M_DCOFF_RF3V3_2dBm
//#define RF_18_7G_4V2_32M_DCOFF_RF1V8_2dBm
//#define RF_18_7G_4V2_32M_DCON_RF3V3_8dBm
//#define RF_18_7G_4V2_32M_DCON_RF3V3_4dBm
//#define RF_18_7G_4V2_32M_DCON_RF3V3_N2dBm
//#define RF_18_7G_4V2_32M_DCOUTPUT_2dBm
//#define RF_18_7G_4V2_32M_DCOUTPUT_0dBm
//#define RF_18_7G_4V2_32M_DCOUTPUT_N2dBm
//#define RF_18_7G_4V2_32M_DCOUTPUT_N5dBm
//#define RF_18_7G_4V2_32M_DCOUTPUT_N10dBm
//#define RF_18_7G_4V2_32M_DCOUTPUT_N15dBm
//#define RF_18_7G_4V2_32M_DCOUTPUT_N20dBm
//#define RF_18_7G_4V2_32M_DCOUTPUT_N30dBm

//4.2V	96M
//#define RF_18_7G_4V2_96M_DCOFF_RF3V3_8dBm
//#define RF_18_7G_4V2_96M_DCOFF_RF3V3_4dBm
//#define RF_18_7G_4V2_96M_DCOFF_RF3V3_2dBm
//#define RF_18_7G_4V2_96M_DCOFF_RF1V8_2dBm
//#define RF_18_7G_4V2_96M_DCON_RF3V3_8dBm
//#define RF_18_7G_4V2_96M_DCON_RF3V3_4dBm
//#define RF_18_7G_4V2_96M_DCON_RF3V3_N2dBm
//#define RF_18_7G_4V2_96M_DCOUTPUT_2dBm
//#define RF_18_7G_4V2_96M_DCOUTPUT_0dBm
//#define RF_18_7G_4V2_96M_DCOUTPUT_N2dBm
//#define RF_18_7G_4V2_96M_DCOUTPUT_N5dBm
//#define RF_18_7G_4V2_96M_DCOUTPUT_N10dBm
//#define RF_18_7G_4V2_96M_DCOUTPUT_N15dBm
//#define RF_18_7G_4V2_96M_DCOUTPUT_N20dBm
//#define RF_18_7G_4V2_96M_DCOUTPUT_N30dBm

//3.3V	32M
//#define RF_18_7G_3V3_32M_DCOFF_RF3V3_8dBm
//#define RF_18_7G_3V3_32M_DCOFF_RF3V3_4dBm
//#define RF_18_7G_3V3_32M_DCOFF_RF3V3_2dBm
//#define RF_18_7G_3V3_32M_DCOFF_RF1V8_2dBm
//#define RF_18_7G_3V3_32M_DCON_RF3V3_8dBm
//#define RF_18_7G_3V3_32M_DCON_RF3V3_4dBm
//#define RF_18_7G_3V3_32M_DCON_RF3V3_N2dBm
//#define RF_18_7G_3V3_32M_DCOUTPUT_2dBm
//#define RF_18_7G_3V3_32M_DCOUTPUT_0dBm
#define RF_18_7G_3V3_32M_DCOUTPUT_N2dBm
//#define RF_18_7G_3V3_32M_DCOUTPUT_N5dBm
//#define RF_18_7G_3V3_32M_DCOUTPUT_N10dBm
//#define RF_18_7G_3V3_32M_DCOUTPUT_N15dBm
//#define RF_18_7G_3V3_32M_DCOUTPUT_N20dBm
//#define RF_18_7G_3V3_32M_DCOUTPUT_N30dBm

//3.3V	96M
//#define RF_18_7G_3V3_96M_DCOFF_RF3V3_8dBm
//#define RF_18_7G_3V3_96M_DCOFF_RF3V3_4dBm
//#define RF_18_7G_3V3_96M_DCOFF_RF3V3_2dBm
//#define RF_18_7G_3V3_96M_DCOFF_RF1V8_2dBm
//#define RF_18_7G_3V3_96M_DCON_RF3V3_8dBm
//#define RF_18_7G_3V3_96M_DCON_RF3V3_4dBm
//#define RF_18_7G_3V3_96M_DCON_RF3V3_N2dBm
//#define RF_18_7G_3V3_96M_DCOUTPUT_2dBm
//#define RF_18_7G_3V3_96M_DCOUTPUT_0dBm
//#define RF_18_7G_3V3_96M_DCOUTPUT_N2dBm
//#define RF_18_7G_3V3_96M_DCOUTPUT_N5dBm
//#define RF_18_7G_3V3_96M_DCOUTPUT_N10dBm
//#define RF_18_7G_3V3_96M_DCOUTPUT_N15dBm
//#define RF_18_7G_3V3_96M_DCOUTPUT_N20dBm
//#define RF_18_7G_3V3_96M_DCOUTPUT_N30dBm

//custom
//2416
//#define BX2416_IDLE_MODE
//#define RF_18_7G_3V3_32M_DCOFF_RF3V3_BX2416_SINGLE_5dBm
//ZLG
//#define ZLG_RF
//4.2V 32M
//#define RF_18_7G_4V2_32M_DCON_DCDCOUTPUT_ZLG_2dBm
//#define RF_18_7G_4V2_32M_DCON_DCDCOUTPUT_ZLG_0dBm
//#define RF_18_7G_4V2_32M_DCON_DCDCOUTPUT_ZLG_N2dBm
//#define RF_18_7G_4V2_32M_DCON_DCDCOUTPUT_ZLG_N10dBm
//#define RF_18_7G_4V2_32M_DCON_DCDCOUTPUT_ZLG_N20dBm
//#define RF_18_7G_4V2_32M_DCON_DCDCOUTPUT_ZLG_N30dBm
//4.2V 96M
//#define RF_18_7G_4V2_96M_DCON_DCDCOUTPUT_ZLG_2dBm
//#define RF_18_7G_4V2_96M_DCON_DCDCOUTPUT_ZLG_0dBm
//#define RF_18_7G_4V2_96M_DCON_DCDCOUTPUT_ZLG_N2dBm
//#define RF_18_7G_4V2_96M_DCON_DCDCOUTPUT_ZLG_N10dBm
//#define RF_18_7G_4V2_96M_DCON_DCDCOUTPUT_ZLG_N20dBm
//#define RF_18_7G_4V2_96M_DCON_DCDCOUTPUT_ZLG_N30dBm
//3.3V 32M
//#define RF_18_7G_3V3_32M_DCON_DCDCOUTPUT_ZLG_2dBm
//#define RF_18_7G_3V3_32M_DCON_DCDCOUTPUT_ZLG_0dBm
//#define RF_18_7G_3V3_32M_DCON_DCDCOUTPUT_ZLG_N2dBm
//#define RF_18_7G_3V3_32M_DCON_DCDCOUTPUT_ZLG_N10dBm
//#define RF_18_7G_3V3_32M_DCON_DCDCOUTPUT_ZLG_N20dBm
//#define RF_18_7G_3V3_32M_DCON_DCDCOUTPUT_ZLG_N30dBm
//3.3V 96M
//#define RF_18_7G_3V3_96M_DCON_DCDCOUTPUT_ZLG_2dBm
//#define RF_18_7G_3V3_96M_DCON_DCDCOUTPUT_ZLG_0dBm
//#define RF_18_7G_3V3_96M_DCON_DCDCOUTPUT_ZLG_N2dBm
//#define RF_18_7G_3V3_96M_DCON_DCDCOUTPUT_ZLG_N10dBm
//#define RF_18_7G_3V3_96M_DCON_DCDCOUTPUT_ZLG_N20dBm
//#define RF_18_7G_3V3_96M_DCON_DCDCOUTPUT_ZLG_N30dBm
//BQB
//#define RF_18_7G_3V3_32M_DCON_DCDCOUTPUT_BQB_1dBm
//------------------------------------------------------



#define RF_REG_0		*(volatile uint32_t*)0x20201070
#define RF_REG_1		*(volatile uint32_t*)0x20201074
#define RF_REG_2		*(volatile uint32_t*)0x20201078
#define RF_REG_3		*(volatile uint32_t*)0x2020107C
#define RF_REG_4		*(volatile uint32_t*)0x20201080
#define RF_REG_5		*(volatile uint32_t*)0x20201084
#define RF_REG_6		*(volatile uint32_t*)0x20201088
#define RF_REG_7		*(volatile uint32_t*)0x2020108C
#define RF_REG_8		*(volatile uint32_t*)0x20201090
#define RF_REG_9		*(volatile uint32_t*)0x20201094
#define RF_REG_a		*(volatile uint32_t*)0x20201098
#define RF_REG_b		*(volatile uint32_t*)0x2020109C
#define RF_REG_c		*(volatile uint32_t*)0x202010A0
#define RF_REG_d		*(volatile uint32_t*)0x202010A4
#define RF_REG_e		*(volatile uint32_t*)0x202010A8
#define RF_REG_f		*(volatile uint32_t*)0x202010AC


void rf_power_setting(void);


#endif


